This study presents a single-event effect(SEE)testing system for analog-to-digital converters(ADC)， implemented on an FPGA. The system accurately evaluates the SEE response of high speed ADCs with a JESD204B interface. Single-event functional interrupts(SEFI)are detected by reconstructing the waveform using a digital-to-analog converter(DAC). Additionally，the system can detect and record the single-event upsets(SEU)and single-event latch-ups(SEL)，addressing the data storage challenges associated with high-speed ADC. The system was experimentally verified on SESRI and the HI-13 accelerator. Observations of single-event effects，latch-ups，and functional interruptions were successfully captured，providing valuable guidance for the subsequent reinforcement and design improvement of ADC devices.