Time-interleaved analog-to-digital converters(TIADCs) are widely used in high-speed ADC architecture to meet increasing demands for higher sampling rates in communication，radar，and related applications. However，time-interleaving introduces non-idealities，particularly timing skew，which can significantly degrade ADC performance. This review focuses on timing skew and its background calibration methods in TIADCs，covering the fundamental principles of time interleaving，the mechanisms and effects of timing skew，and various background calibration strategies. Existing background calibration techniques are classified into three categories:autocorrelation-based，reference-channel-based，and reference-signal-based methods. Each approach is analyzed in depth.