A low-dropout linear regulator with high power supply rejection(PSR) and low quiescent current was designed using a 0.18 μm BCD process. A detailed analysis was conducted on the effects of multiple power ripple propagation paths on the PSR of the system. A three-stage error amplifier with a dual-rail power supply was designed to optimize the PSR at low-middle frequency. Additionally, a pre-regulator was introduced to reduce the influence of the voltage reference module on the low-frequency PSR of the system. An ultra-low quiescent current-voltage reference based on the depletion transistor was designed to lower the quiescent current of the system. Simulation results demonstrate that the quiescent current can be as low as 5 μA at different output voltages, and within a load current range of 250 mA, the PSR is below -110 dB at 1 kHz and below -55 dB at 1 MHz.