U型高K介质膜槽栅垂直场板LDMOS
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(天津理工大学 集成电路科学与工程学院, 天津 300384)

作者简介:

钱 图(2001—),男(汉族),湖南岳阳人,本科生,研究方向为LDMOS半导体器件设计。 代红丽(1978—),女(汉族),河北唐山人,博士研究生,研究方向为功率半导体器件设计。通信作者。

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中图分类号:

TN386.1

基金项目:

天津市大学生创新创业训练计划项目(202210060101)


An U-Shaped High-K Dielectric Film Trench Gate Vertical Field Plate LDMOS
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(School of Integrated Circuit Science and Engineering, Tianjin University of Technology, Tianjin 300384, P. R. China)

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    摘要:

    近年来,随着汽车电子和电源驱动的发展,集成度较高的LDMOS作为热门功率器件受到了关注,如何提高其击穿电压与降低其比导通电阻成为提高器件性能的关键。基于SOI LDMOS技术,文章提出了在被4 μm的高K介质膜包围的SiO2沟槽中引入垂直场板的新型结构。与传统沟槽LDMOS相比,垂直场板和高K介质膜充分地将电势线引导至沟槽中,提高了击穿电压。此外垂直场板与高K介质和漂移区形成的MIS金属-绝缘层-半导体电容结构能增加漂移区表面的电荷量,降低比导通电阻。通过二维仿真软件,在7.5 μm深的沟槽中引入宽0.3 μm、深6.8 μm的垂直场板,实现了具有300 V的击穿电压和4.26 mΩ·cm2的比导通电阻,以及21.14 MW·cm-2的Baliga品质因数的LDMOS器件。

    Abstract:

    In recent years, with the development of automotive electronics and power drives, LDMOS with higher integration has received attention as a popular power device. How to increase its breakdown voltage and reduce its specific on-resistance has become the key to improve the device’s performance. Based on SOI LDMOS technology, a novel structure with a vertical field plate introduced in the SiO2 trench surrounded by a 4 μm high-K dielectric film was proposed in this paper. Compared with the traditional trench LDMOS, the vertical field plate and the high-K dielectric film fully guide the potential lines into the trench, which improves the breakdown voltage. In addition, the metal-insulator-semiconductor capacitive structure formed by the vertical field plate, the high-K dielectric and the drift region can increase the amount of charge on the surface of the drift region and reduce the specific on-resistance. Through 2-D simulation software, by introducing a vertical field plate with a width of 0.3 μm and a depth of 6.8 μm into a depth of 7.5 μm trench, an LDMOS was realized, with the breakdown voltage of 300 V, the specific on-resistance of 4.26 mΩ·cm2, and the Baliga quality factor of 21.14 MW·cm-2.

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  • 收稿日期:2023-08-04
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  • 在线发布日期: 2024-04-01
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