The 4H-SiC MOSFET with a shallow trench is designed and studied to reduce the specific on-resistance and turn-on loss. The proposed structure shows a lower CGS and CGD/CGS because of the shallow trench in the JFET region. By introducing the highly doped N+ region under the trench, the electron quasi-fermi potential across the inversion layer along the interface of SiC/SiO₂ is increase, which improves the current capability of the MOSFET and reduce the specific on-resistance R_on. And the simulation results demonstrate that the specific on-resistance of the proposed structure is reduced by 14% and 17.8% compared with that of the planar MOSFET and split gate MOSFET, respectively. Besides, the turn-on loss is also reduced by 20% compared with that of the planar MOSFET.