A 16-bit voltage output type digital-to-analog converter (DAC) with 10-bit resistor string divider and 6-bit interpolation structure was designed. The high 10-bit element consisted of a 1 024 resistors string voltage divider network. The lower 6-bit element was made of 64 op-amp input stage interpolation structure. Both of them were linearly superimposed by thermometer, which structurally ensured the monotonicity of the 16-bit D/A converter. The output amplifier of the D/A converter adopted PMOS input folded cascode, Class AB output buffer structure and multi-stage nested Miller compensation (NMCNR). The stability under high DC gain and large capacitance load was realized. The 16-bit D/A converter was designed in a 0.6 μm CMOS process. The supply voltage was set at 5 V. The simulation results show that the differential nonlinear error (DNL) is 0.35 LSB, the integral nonlinear error (INL) is 3.05 LSB, the set-up time is 6.12 μs, the spurious-free dynamic range (SFDR) is 93.41 dB, and the power consumption is 1.842 mW. With a 470 pF capacitor load, the output op-amp DC gain is 150.63 dB, the unit gain bandwidth is 1.59 MHz, and the phase margin is 65.84°.