A quad high voltage radiation hardened voltage output 12-bit DAC was designed and implemented in a 0.6 μm standard CMOS process with high and low voltage devices. The R-2R ladder network and high-voltage multistage folding-cascode operational amplifier which operated as a buffer output was proposed. This structure realized the good monotonicity of DAC and improved its radiation resistance. The chip size was 5.80 mm×3.70 mm. The test results showed that the output range of the DAC was -2.5~2.5 V, the power consumption was 26.95 mW, the DNL was 0.41 LSB, the INL was 0.34 LSB, the settling time was 6.5 μs, and the INL compatibility was 0.11 LSB at ±5 V power supply.