一种用于模数转换器时钟管理电路的电荷泵
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(1. 重庆邮电大学 光电工程学院, 重庆 400065;2. 重庆邮电大学 计算机科学与技术学院, 重庆 400065)

作者简介:

周前能(1973—), 男(汉族),四川资中人,博士,教授,从事模拟集成电路设计。

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TN792

基金项目:

重庆市技术创新与应用发展专项重点项目(cstc2020jscx-gksbX0012,cstc2021jscx-gksbX0038);重庆市自然科学基金资助项目(cstc2021jcyj-msxmX0590,cstc2021ycjh-bgzxm0085)


A Charge Pump for Clock Management Circuit of Analog-to-Digital Converters
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(1. College of Optoelectonic Engineering, Chongqing Univ. of Posts and Telecommun., Chongqing 400065, P. R. China;2. College of Computer Sci. and Technol., Chongqing Univ. of Posts and Telecommun., Chongqing 400065, P. R. China)

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    摘要:

    采用0.13 μm CMOS工艺,设计了一种用于模数转换器时钟电路的电荷泵。在共源共栅充/放电流源与其偏置电路之间增加传输门,有效地抑制了电荷泵关闭时产生的漏电流。同时,采用电流源提升技术,有效地提高了电荷泵充/放电电流支路的阻抗,抑制了沟道长度调制效应的影响,提高了电荷泵的电流匹配性。仿真结果表明,在1.2 V电源电压、20 μA输出电流的条件下,输出电压的变化范围为0.13~0.93 V时,该电荷泵的充/放电电流失配低于1%。

    Abstract:

    A charge pump for clock management circuit of analog-to-digital converters (ADC) was designed in a 0.13 μm CMOS process. By adding transmission gates between the cascode charge-discharge current source and its bias circuit, the generation of leakage current was effectively suppressed when the charge pump was turned off. By adopting the current source enhanced technique, the impedance of charge-discharge current branch of charge pump was effectively improved, and the influence of channel-length modulation effect was suppressed, so the current matching performance of charge pump was effectively improved. Simulation results showed that the charge-discharge current mismatch was less than 1% with the output voltage varied from 0.13 V to 0.93 V under the condition of 1.2 V power supply voltage and 20 μA output current.

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  • 收稿日期:2022-01-20
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  • 在线发布日期: 2022-09-19
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